discrete signals - Phase Locked Loop Basics

I am trying to better understand discrete-time PLLs. I drew a picture of a simple feedback system here:

I want to be able to describe and understand the system at v(t) and y(t). I found a fairly good reference with the following diagram:

I am still having a hard time and I think if I could see a signal go through this system either visually or computationally, I would be able to understand it better. So for example in my diagram, what would $y(t)$ and $v(t)$ be if $x(t)=5u(t)$ and $h(t)=6{\delta(t)}$?

Answer

You're probably better off skipping the $5u(t)$ idea and going straight to a periodic input, probably a sinusoid. A phase locked loop is for signals that have a phase to lock onto, whereas $u(t)$ doesn't have a phase. The Stanford reference looks pretty good. Start by comparing that to your feedback system: Note that the phase detector is a multiplication, where you appear to have an addition. Also notice that the VCO isn't actually putting out $\hat \theta$, but $\hat s(t) = \cos\left(\omega_{lo}t + \hat\theta(t)\right)$.

So after the multiplication you end up with the sum of two new sinusoids, one at the sum of the frequencies of $\hat s(t)$ and $s(t)$, the other at their difference. The loop filter is there to remove the higher frequency one, leaving just the difference, which will be $\sin\left(\theta(t) - \hat\theta(t)\right)$.

Now consider a few different situations. First, the easy one - the input is running at exactly the same frequency as the local oscillator, so $s(t) = \cos(\omega_{lo}t)$. Assume there is nothing on the input to the VCO to begin with, and so $\hat\theta(t) = 0$ too. The output from the phase detector will be only the high frequency term, and that will get filtered out by the loop filter, leaving $e(t) = 0$. The system is in equilibrium, everyone can go home and have a beer.

But now the frequency of the input signal increases a little. $\theta(t)$ is now a linearly increasing value (if it were a constant, then the input signal would still have the same frequency, but just be delayed or advanced a bit). Now the phase detector is also producing a low frequency term, $\sin(\theta(t))$ in addition to the high frequency one. This is passed through the filter, and since the frequency only increased a little, $\theta(t)$ is small so $\sin(\theta(t)) \approx \theta(t)$.

This means that $e(t)$ is no longer zero, and so the phase of the VCO begins to increase; $\hat s(t)$ runs faster. If it hasn't caught up to the frequency of $s(t)$, then the phase difference will continue to increase, and since that difference is being integrated by the VCO, the VCO frequency will increase faster. Eventually the VCO will be running at the same frequency as $s(t)$. However, note that it will be lagging in phase: To run at the same frequency, $\hat\theta(t)$ needs to be increasing at the same rate as $\theta(t)$. For $\hat\theta(t)$ to be increasing linearly, $e(t)$ needs to be a constant, and non-zero, which means $\theta(t) - \hat\theta(t)$ must be non-zero.

If the frequency of the input signal were to decrease, you would get a similar situation, except that now the VCO output would be leading the input signal rather than lagging.

In a real situation, the input signal frequency is usually changing all the time (otherwise you wouldn't need a PLL to track it), and all this is happening constantly. Hopefully you can see from this description that if the input frequency changes too quickly then the system can be thrown off (remember the small angle approximation I used).

I believe the principles for a discrete-time PLL are similar. Sampling rates with respect to the input frequency will need to be considered, as usual.

Hope that helps, I'm not sure if you are completely familiar with continuous PLLs and just looking for the differences when you go discrete, or the whole thing is a little fuzzy for you. Since you've got continuous-time looking variables in your feedback system diagram I've assumed the whole PLL game is of interest to you.